Architecture
One Session, many crates. Device facts live in HAD TOML. The IDE paints that Session; it does not reimplement CAD. This is not a vendor-tool wrapper.
Pipeline
helion-sv / vhdl / hls → HNF
helion-pack → place → route (PathFinder)
helion-sta (XDC) → helion-drc → helion-bits
helion-fabric / helion-sim / helion-hw
helion-gui IdeModel paints the SessionCrates
| Crate | Job |
|---|---|
helion-sv | SystemVerilog subset, preprocess, synth to LUT6/FF (sv-parser + AIG + FlowMap) |
helion-vhdl | VHDL-2008 elaborator, same LUT/FF path as SV |
helion-hls | C subset onto LUT/FF/DSP |
helion-ir | HNF cells/nets/ports (DONT_TOUCH, mark_debug, LOC) |
helion-pack | LUTFF, IOB, MAC27, BRAM18 |
helion-place | Timing-driven place (timing_weight 0.75 on gold run) |
helion-route | PathFinder A* with hop delay in the cost |
helion-sta | XDC/SDC constraints, WNS + hold (see crates/helion-sta/src/lib.rs::load_xdc) |
helion-drc | Occupancy, unrouted IO, clocks |
helion-bits | FeatureMap frames, sparse .hbits, partial (DFX) |
helion-fabric / helion-sim | Cycle fabric (6-input IMUX LUT + FF + IOB + STAT) and event kernel |
helion-hw | IEEE 1149.1 TAP, sim cable, OFL / native MPSSE |
helion-gui | IdeModel + eframe shell (helion-ide) |
helion-proj | Tcl Session commands and .prj / read_ip |
helion-device | HAD load |
helion-cli | helion binary |
XDC (load_xdc)
Constraint commands Helion parses are the first-token arms of
load_xdc in crates/helion-sta/src/lib.rs.
Point at that crate; do not treat this as a vendor constraint product.
Object queries (get_ports, get_pins,
get_clocks, get_cells) are arguments, not extra
commands. Unknown first tokens are ignored. Empty-XDC gold stays
WNS_PS=9640.
Commands (only these):
create_clock
create_generated_clock
set_input_delay
set_output_delay
set_false_path
set_multicycle_path
set_max_delay
set_min_delay
set_clock_groups
set_clock_uncertainty
set_clock_latency
set_disable_timing
set_case_analysis
set_propagated_clock
set_clock_sense
set_input_jitter
set_system_jitter
set_timing_derate
set_bus_skew
group_path
set_max_time_borrow
set_data_check
set_operating_conditions
set_property
set_property keys: PACKAGE_PIN,
IOSTANDARD, DRIVE, SLEW,
PULLTYPE, DIFF_TERM, IN_TERM.
Tcl Session CAD commands (synth_design,
place_design, …) are a different list, below. They are not
load_xdc commands.
Part HL10T-C32-1
CAD must query devices/helion/parts/HL10T-C32-1.toml. How to
open it in the IDE: Use.
| Field | Value |
|---|---|
| part | HL10T-C32-1 |
| idcode | 0x00011A1F |
| interior CLB | 32×32 (1024 CLB sites, 8 BLE each) |
| user IO | 32 (IO ring) |
| clock spine | x=1, 8 gclk |
| BRAM18 | 8 |
| MAC27 | 0 on this SKU |
| speed | 1 |
| grid | x=0 IO, x=1 CLK, x=2..33 CLB, x=34 IO; y=0 IO, y=1..32 interior, y=33 IO |
IR (HNF)
Cells, nets, and ports carry DONT_TOUCH, mark_debug,
and LOC. helion hnf file.sv writes a round-trippable
netlist. Checkpoints embed HNF. Restore must reproduce the same bitstream hash.
(* keep *) / (* mark_debug *) and for
generate unroll into that IR.
Tcl Session
CAD Session (not the load_xdc list):
synth_design, opt_design, place_design,
route_design, write_bitstream, write_hnf,
get_cells / get_nets / get_pins,
set_property, report_timing,
report_utilization, open_hw_manager,
program_hw, mark_debug, eco,
write_checkpoint, report_die.
Each command drives the real engine.
Bitstream
FeatureMap frames, sparse .hbits (encode/decode), partial program
(DFX). Gold counter is 185 bytes because only configured frames are written.
HELIONLIB primitives: LUT6, HFF, MAC27, BRAM18. Device facts live in HAD, not
hardcoded in the CAD.
Gold
Empty-XDC examples/counter.sv at 10.000 ns:
4 LUTFF, 1 IOB, WNS_PS=9640,
LED[16]=0000000111111110. QoR is gated in
crates/helion-cli/tests/qor.rs. A LUT / WNS / bitstream-size
change must update the table in the same commit with a reason.